UNIT II-EMBEDDED SYSTEM

UNIT II-EMBEDDED SYSTEM

Instruction Set and Programming Moving Data-Addressing Modes-Logical operations Arithmetic Operation-Jump and Call Instructions-Simple Program. Applications: Keyboard Interface- Display Interface-Pulse Measurements-DIA and AID Conversions-Multiple Interrupts.

Applications: Keyboard Interface- Display Interface-Pulse Measurements-DIA and AID Conversions-Multiple Interrupts.

2.1)INSTRUCTION SET AND PROGRAMMING MOVING DATA

·       The instruction set of the 8051 microcontroller is a collection of commands that the microcontroller's CPU can execute. Each instruction is represented by a unique op-code and performs a specific operation, such as data transfer, arithmetic, logical operations, control transfer, and more.

·    The 8051 microcontroller's instruction set consists of a variety of instructions designed to perform different operations.

Types of instructions:

1. Data Transfer Instructions

These instructions move data between registers, memory, and the accumulator.

• MOV: Move data.
• PUSH: Push data onto the stack.
• POP: Pop data from the stack.
• XCH: Exchange data between the accumulator and another register/memory.

2. Arithmetic Instructions

These instructions perform arithmetic operations.

• ADD: Add two operands.
• ADDC: Add with carry.
• SUBB: Subtract with borrow.
• INC: Increment by one.
• DEC: Decrement by one.
• MUL: Multiply two unsigned 8-bit numbers.
• DIV: Divide two unsigned 8-bit numbers.

3. Logical Instructions

These instructions perform logical operations.

• ANL: Logical AND.
• ORL: Logical OR.
• XRL: Logical XOR.
• CLR: Clear a bit or register.
• CPL: Complement a bit or register.

4. Control Transfer Instructions

These instructions alter the flow of execution.

• JMP: Jump to a specified address.
• SJMP: Short jump.
• AJMP: Absolute jump.
• CJNE: Compare and jump if not equal.
• DJNZ: Decrement and jump if not zero.
• CALL: Call a subroutine.
• RET: Return from a subroutine.

5. Boolean Instructions

These instructions manipulate individual bits.

• SETB: Set a bit.
• CLR: Clear a bit.
• CPL: Complement a bit.
• ANL: Logical AND a bit.
• ORL: Logical OR a bit.

6. Data Exchange Instructions

These instructions exchange data between the accumulator and other registers/memory.

• XCH: Exchange data.
• XCHD: Exchange digit in the accumulator with digit in the memory.

This is a high-level overview of the 8051 instruction set. Each instruction has a specific op-code and format, which you can refer to in the 8051's datasheet or instruction set manual for more detailed information.

·       Any instruction given to the microcontroller contains two parts: an opcode and an operand.

·       The opcode is responsible for telling the microcontroller what to do, whereas the operand holds the data on which the operations are to be performed.

·       The 8051 microcontroller has an 8-bit opcode which gives it the ability to handle 2^8(255) instructions. The operands, on the other hand, can be of 0 bytes, 1 byte or 2 bytes.

·       Data transfer instructions in 8051 that are a subset of the instructions.These instructions are responsible for moving data from one place to another in the microcontroller.

·       So when the microcontroller turns on the program counter holds the starting address (0000H). The programmer can change this starting address, but if no changes are made, then the microcontroller puts this address on the address bus. The address bus locates the memory location on the ROM and gets the instruction.

·       Then the microcontroller increments the program counter according to the size of the instruction. Once the instruction is retrieved, it is placed in the instruction register.

·       Afterward, the instruction decoder decodes the instruction, and the control unit generates the control signals accordingly

Op-code:

·       op-code (short for operation code) is a part of the machine language instruction that specifies the operation to be performed.

·       The 8051 microcontroller uses op-codes to interpret and execute various instructions in its instruction set. Each op-code corresponds to a specific command or function, such as loading a register with a value, moving data, performing arithmetic operations, or jumping to a different location in the program.

Example-The op-code for the MOV instruction, which moves data from one location to another, is 74h. When the 8051 encounters this op-code, it knows to execute the move operation.

mnemonics

·       mnemonics are shorthand representations of machine language instructions, making it easier for programmers to write and read assembly language code.

·       Each mnemonic corresponds to an op-code and typically consists of an abbreviation of the instruction's name.

Example:

MOV: Move data from one location to another.

ADD: Add the contents of a register or memory location to the accumulator.

DATA TRANSFER INSTRUCTIONS

Data transfer instructions are responsible for transferring data between various memory storing elements like registers, RAM, and ROM.

In the table

[A]= Accumulator; [Rn]=Register in RAM; DPTR=Data Pointer; PC=Program Counter

1)MOV Instruction

The MOV instruction has two operands, the source, and the destination.

·       The second operand is the source, whereas the first one is the destination.

·       This instruction uses various addressing modes to move data in the RAM space of the microcontroller.

 

Operation	Mnemonics	Description
Register to register	MOV A, Rn	[A]<-[Rn]
	MOV Rn, A	[Rn]<-[A]
	XCH A, Rn	[A]<-[Rn]
Memory to register	MOV A, @Rn	[A]<-[Address in register]
	MOV A, address	[A]<-[Address]
	MOV Rn, address	[Rn]<-[Address]
	MOVX A, @Rn	[A]<-[Address in External ROM]
	MOVC A, @A+DPTR	[A]<-[Address in Internal ROM]
	MOVC A, @A+PC	[A]<-[Address in Internal ROM]
	MOVX A, @DPTR	[A]<-[Address in External ROM]
	XCH A, @Rn	[A]<-[Address]
	XCHD A, @Rn	[A]<-[Address]
	XCH A, address	[A]<-[Address]
Register to memory	MOVX @Ri, A	[Address]<-[A]
	MOV a8, A	[Address]<-[A]
	MOV a8, Rn	[Address]<-[Rn]
	MOVX @DPTR, A	[Address]<-[A]
	MOV @Rn, A	[Address]<-[A]
Data to Register	MOV A, #data	[A]<-[Data]
	MOV Rn, #data	[Rn]<-[Data]
	MOV DPTR, #data	[DPTR]<-[Data]
Address to Address	MOV a8, @Rn	[Address]<-[Address]
	MOV address, address	[Address]<-[Address]
	MOV @Rn, address	[Address]<-[Address]
Data to address	MOV address, #data	[Address]<-[Data]
	MOV @Rn, #d8	[Address]<-[Data]
Stack	PUSH a8	Data added to stack
	POP a8	Data removed from the stack

MOV Instruction

The MOV instruction has two operands, the source, and the destination. The second operand is the source, whereas the first one is the destination. This instruction uses various addressing modes to move data in the RAM space of the microcontroller.

• MOV A, R0 //Moves data from the register R0 to the accumulator
• MOV R0,50H //Moves data stored in memory location 50H to Ro
• MOV A,@R0 //Uses data stored in R0 register as an address and moves the data at that location to the accumulator

Opcode	Operand	Description	Size	Execution Time	Flags affected
MOV	A, Rn	Moves data from registers in register banks of RAM to accumulator	1 byte	12 clock cycles	None
	A, Address	Moves data from an address in the RAM space to the accumulator	2 byte	12 clock cycles	None
	A,@Rn	Uses data stored in a register as an address and moves the data at that address to the accumulator	1 byte	12 clock cycles	None
	A,#Data	Moves data given by programmer directly to the accumulator	2 byte	12 clock cycles	None
	Rn,A	Moves data from the accumulator to registers in register bank	1 byte	12 clock cycles	None
	Rn, Address	Moves data from an address in the RAM space to a register in the register banks	2 bytes	24 clock cycles	None
	Rn,#Data	Moves data given by a programmer directly to a register in the register banks	2 bytes	12 clock cycles	None
	Address,A	Moves data to an address in the RAM space from the Accumulator	2 bytes	12 clock cycles	None
	Address,Rn	Moves data to an address in the RAM space to a register in the register banks	2 bytes	24 clock cycles	None
	Address, Address	Moves data from one address to the other	3 bytes	24 clock cycles	None
	Address,@Ri	Uses data stored in a register as an address and moves the data at that address to a register in the register bank	3 bytes	24 clock cycles	None
	Address,#Data	Moves data given by the programmer directly to an address	3 bytes	24 clock cycles	None
	@Rn,A	Moves data from the accumulator to an address which is stored in a register	1 byte	12 clock cycles	None
	@Rn, Address	Moves data from an address to an address which is stored in a register	2 bytes	24 clock cycles	None
	@Rn,#Data	Moves data given by the programmer to an address which is stored in  the register	2 bytes	12 clock cycles	None
	DPTR,#Data	Places a memory address of 16-bit size in the DPTR Register	3 bytes	24 clock cycles	None

 

2)MOVC Instruction

MOVC instruction is responsible for moving data from the Program memory (Flash memory) to the RAM for processing it.

Example

• MOVC A,@A+DPTR
• MOVC A,@A+PC

Opcode	Operand	Description	Size	Execution time	Flags affected
MOVC	A, @A+DPTR	Moves data to accumulator from a address stored in the  memory location (internal ROM) at A+DPTR	1 byte	24 clock cycles	None
	A, @A+PC	Moves data to accumulator from a address stored in the memory location(internal ROM) at A+PC	1 byte	24 clcok cyles	None

 

3)MOVX Instruction

The 8051 microcontroller in most cases has an on-chip 4K flash memory, but due to its 16-bit address bus, it can access 64k memory locations. Due to this reason, the 8051 can be interfaced with external memory using ports 0 and 2. To access data in this external memory, the MOVX instruction is used

Opcode	Operand	Description	Size	Execution time	Flags affected
MOVX	A, @Rn	Moves data to accumulator from a memory location (External ROM)	1 byte	24 Clock cycles	None
	@Rn,A	Moves data to Memory location (External ROM) from a register in the register bank	1 byte	24 Clock cycles	None
	A, @DPTR	Moves data to accumulator from a memory location (External ROM) pointed  by the Data Pointer	1 byte	24 Clock cycles	None
	@DPTR,A	Moves data to Memory location (External ROM) pointed by data pointer from the accumulator	1 byte	24 Clock cycles	None

 

4)Stack operations

·       The RAM of the 8051 microcontroller is home to a set of 32 general-purpose registers (00H-1FH). These registers are 8 bit wide and are bundled in groups of 8 forming four register banks. Stack operations can be used to place data into these registers in an efficient manner.

·       These stack operations use special commands (PUSH, POP) to place and extract data from these general purposes registers.

a)PUSH operation

·       The PUSH operation is used to place data into the stack. When this command is given the value of address stored in the stack pointer is increased by one.

·       After incrementing the address in the stack pointer, data is placed at that memory location.

·       example, when the 8051 is powered up, it holds the address 07H. When it receives the first PUSH instruction, the address is updated to 08H, and data is stored in that location.

Example (R6 contains 80H and stack pointer points at 07H)

PUSH 6; This instruction moves data stored in register R6 to 08H

b)POP operation

·       The POP operation is used to extract data that is stored in the stack.

·       This operation is the complete opposite of the PUSH operation. It extracts the data from the location which the stack pointer points to and then decreases the value of the SP by 1.

Example (Stack pointer points at memory location 08H which contains 50H)

POP 6; register R6 now contains the data 50H and the stack pointer points to 07H

Opcode	Operand	Description	Execution Time	Size	Flags affected
PUSH	Rn	Places value at the top of the stack	24 clock cycles	2 bytes	None
POP	Rn	Extracts the data from the top of the stack	24 clock cycles	2 bytes	None

5)Exchange Instructions 

This operation is used to exchange data between the source and the destination operands.

Example

• XCH A, R0; exchanges the data stored in the accumulator and R0
• XCHD A,@R0; Exchanges the lower four bits of a memory location stored in a register with the accumulator

Opcode	Operand	Description	Size	Execution time	Flags affected
XCH	A,Rn	Exchanges the value between a register and the accumulator	1 byte	12 Clock cycles	None
	A,Address	Exchanges the value between the accumulator and a memory location in the RAM	2 bytes	12 Clock cycles	None
	A,@Rn	Exchanges the value between the accumulator and a memory location stored in the register	1 byte	12 Clock cycles	None
XCHD	A,@Rn	Exchanges the lower four bits of a memory location stored in a register with the accumulator	1 byte	12 Clock cycles	None

 

2.2)ADDRESSING MODES

An "addressing mode" refers to how you are addressing a given memory location. In summary, the addressing modes are as follows, with an example of each:

 

Ø  Immediate Addressing Mode

Ø  Register Addressing Mode

Ø  Direct Addressing Mode

Ø  Register Indirect Addressing Mode

Ø  Indexed Addressing Mode

 

 

Each of these addressing modes provides important flexibility.

 

1)Immediate Addressing

In this addressing mode, the source operand is a constant. In immediate addressing mode, the operand comes immediately after the opcode. Notice that the immediate data must be preceded by the pound sign “#”.

 

MOV A,#25H ; load 25H into A

 

MOV R3, # 67H ; load 67H into R4 register.

 

MOV DPTR, #9250H ; load 9250H into DPTR(Data Pointer)

 

Immediate addressing is very fast since the value to be loaded is included in the instruction.

 

However, since the value to be loaded is fixed at compile-time it is not very flexible.

 

 

2)Register Addressing

Register addressing mode involves the use of registers to hold the data to be manipulated. Examples of register addressing mode follow;

 

MOV A, R0 ; copy the contents of R0 into A MOV R5, A ; copy the contents of A into R5

It should be noted that the source and destination registers must match in size. Ex: MOV DPTR, A ; is invalid

Notice that we can move data between the accumulator and Rn ( for n=0 to 7) but transfer of data between Rn registers is not allowed. For example the following instruction is invalid

 

MOV R2, R6;

 

3)Direct Addressing

In Direct addressing mode the value to be stored in memory is obtained by directly retrieving it from another memory location. For example:

 

MOV A,30h

 

This instruction will read the data out of Internal RAM address 30 (hexadecimal) and store it in the Accumulator.

 

Direct addressing is generally fast since, although the value to be loaded is not included in the instruction, it is quickly accessible since it is stored in the 8051s Internal RAM. It is also much more flexible than Immediate Addressing since the value to be loaded is whatever is found at the given address--which may be variable.

 

Also, it is important to note that when using direct addressing any instruction which refers to an address between 00h and 7Fh is referring to Internal Memory.

 

Stack and Direct Addressing mode

 

·       Another major use of direct addressing mode is the stack. In the 8051 only direct addressing mode is allowed for pushing onto the stack. Therefore, an instruction such as PUSH A is invalid.

·       Pushing the accumulator contents onto the stack mush be coded as “PUSH 0E0H”, where 0E0 is the address of register A. Direct addressing mode must be used for the POP instruction as well.

 

4)Register Indirect Addressing

·       Indirect addressing is a very powerful addressing mode. In the register indirect addressing mode, a register is used as a pointer to the data. If the data is inside the CPU, only registers R0 and R1 are used for this purpose.

·  In other words, R2-R7 cannot be used to hold the address of an operand located in RAM when using this addressing mode.

·       When R0 and R1 are used as pointers, that is when they hold the address of RAM locations, they must be preceded by the “@” sign.

 

MOV A, @R0 ; move contents of RAM location whose address is held by R0 into A

 

 MOV @R1, B ; move contents of B into RAM location whose address is held by R1

 

For example, lets say R0 holds the value 40h and Internal RAM address 40h holds the value 67h. When the above instruction is executed the 8051 will check the value of R0. Since R0 holds 40h the 8051 will get the value out of Internal RAM address 40h (which holds 67h) and store it in the Accumulator. Thus, the Accumulator ends up holding 67h.

 

Indirect addressing always refers to Internal RAM; it never refers to an SFR

 

Limitations of Register Indirect Addressing mode

 

·       As stated above, R0 and R1 are the only registers that can be used for pointers in register indirect addressing mode. Since R0 and R1 are 8 bits wide, their use is limited to accessing any information in the internal RAM(scratch pad memory of 30H to 7FH ).

 

·       However, there are times when we need to access data stored in external RAM or in the code space of on-chip ROM. Whether accessing externally connected RAM or on-chip ROM, we need a 16-bit pointer. In such cases, the DPTR register is used.

 

5)Indexed Addressing Mode

·       Indexed addressing mode is widely used in accessing data elements of look-up table entries located in the program ROM space of the 8051 microcontroller. The instruction used for this purpose is “MOVC A, @A + DPTR”.

·       The 16-bit register DPTR and register A are used to from the address fo the data element stored in on-chip ROM. Because the data elements are stored in the program (code) space ROM of the 8051, the instruction MOVC is used instead of MOV.

·       The “C” means code in this instruction the contents of A are added to the 16- register DPTR to form the 16-bit address of the needed data.

 

2.3)LOGICAL INSTRUCTIONS 

The next group of instructions are the Logical Instructions, which perform logical operations like AND, OR, XOR, NOT, Rotate, Clear and Swap. Logical Instruction are performed on Bytes of data on a bit-by-bit basis.

Mnemonics associated with Logical Instructions are as follows:

·       ANL

·       ORL

·       XRL

·       CLR

·       CPL

·       RL

·       RLC

·       RR

·       RRC

·       SWAP

Mnemonic	Description
ANL	Logical AND
ORL	Logical OR
XRL	Ex-OR
CLR	Clear Register
CPL	Complement the Register
RL	Rotate a Byte to Left
RLC	Rotate a Byte and Carry Bit to Left
RR	Rotate a Byte to Right
RRC	Rotate a Byte and Carry Bit to Right
SWAP	Exchange lower and higher nibbles in a Byte

 

The following table shows all the possible Mnemonics of the Logical Instructions.

 Operation:ORL Function: Bitwise OR

Syntax:       ORL operand1,operand2

Description: ORL does a bitwise "OR" operation between operand1 and operand2, leaving the resulting value in operand1. The value of operand2 is not affected. A logical "OR" compares the bits of each operand and sets the corresponding bit in the resulting byte if the bit was set in either of the original operands, otherwise the resulting bit is cleared.

 

Operation:ANL Function: Bitwise AND

Syntax:       ANL operand1, operand2

Description: ANL does a bitwise "AND" operation between operand1 and operand2, leaving the resulting value in operand1. The value of operand2 is not affected. A logical "AND" compares the bits of each operand and sets the corresponding bit in the resulting byte only if the bit was set in both of the original operands, otherwise the resulting bit is cleared.

 

Operation: XRL

Function:  Bitwise Exclusive OR

Syntax:   XRL operand1,operand2

Description: XRL does a bitwise "EXCLUSIVE OR" operation between operand1 and operand2, leaving the resulting value in operand1. The value of operand2 is not affected. A logical "EXCLUSIVE OR" compares the bits of each operand and sets the corresponding bit in the resulting byte if the bit was set in either (but not both) of the original operands, otherwise the bit is cleared.

 

Operation: CPL

Function:  Complement Register

Syntax:       CPL operand

Description: CPL complements operand, leaving the result in operand. If operand is a single bit then the state of the bit will be reversed. If operand is the Accumulator

then all the bits in the Accumulator will be reversed. This can be thought of as "Accumulator Logical Exclusive OR 255" or as "255-Accumulator." If the operand refers to a bit of an output Port, the value that will be complemented is based on the last value written to that bit, not the last value read from it.

 

Operation:CLR Function: Clear Register Syntax:       CLR register

Description: CLR clears (sets to 0) all the bit(s) of the indicated register. If the register is a bit (including the carry bit), only the specified bit is affected. Clearing the Accumulator sets the Accumulator's value to 0.

 

Operation: RL

Function:  Rotate Accumulator Left

Syntax:       RL A

Description: Shifts the bits of the Accumulator to the left. The left-most bit (bit 7) of the Accumulator is loaded into bit 0.

 

Operation: RR

Function:  Rotate Accumulator Right

Syntax:       RR A

 

Description: Shifts the bits of the Accumulator to the right. The right-most bit (bit 0) of the Accumulator is loaded into bit 7.

 

Operation: RLC

Function: Rotate Accumulator Left Through Carry

Syntax:       RLC A

Description: Shifts the bits of the Accumulator to the left. The left-most bit (bit 7) of the Accumulator is loaded into the Carry Flag, and the original Carry Flag is loaded into bit 0 of the Accumulator. This function can be used to quickly multiply a byte by 2.

Operation: RRC

Function: Rotate Accumulator Right Through Carry

Syntax:       RRC A

Description: Shifts the bits of the Accumulator to the right. The right-most bit (bit 0) of the Accumulator is loaded into the Carry Flag, and the original Carry Flag is loaded into bit 7. This function can be used to quickly divide a byte by 2.

 

2.4)ARITHMETIC INSTRUCTIONS

·       Using Arithmetic Instructions, you can perform addition, subtraction, multiplication and division. The arithmetic instructions also include increment by one, decrement by one and a special instruction called Decimal Adjust Accumulator.

·       The Mnemonics associated with the Arithmetic Instructions of 8051 Microcontroller Instruction Set are:

·       ADD

·       ADDC

·       SUBB

·       INC

·       DEC

·       MUL

·       DIV

·       DA A

Mnemonic	Description
ADD	Addition without Carry
ADDC	Addition with Carry
SUBB	Subtract with Carry
INC	Increment by 1
DEC	Decrement by 1
MUL	Multiply
DIV	Divide
DA A	Decimal Adjust the Accumulator (A Register)

All the possible Mnemonics associated with Arithmetic Instructions are mentioned in the following table.

 

Operation: ADD, ADDC

Function: Add Accumulator, Add Accumulator With Carry

 Description: Description: ADD and ADDC both add the value operand to the value of the Accumulator, leaving the resulting value in the Accumulator. The value operand is not affected. ADD and ADDC function identically except that ADDC adds the value of operand as well as the value of the Carry flag whereas ADD does not add the Carry flag to the result.

 

Operation: SUBB

Function:  Subtract from Accumulator With Borrow

 Description: SUBB subtract the value of operand from the value of the Accumulator, leaving the resulting value in the Accumulator. The value operand is not affected.

 The Carry Bit (C) is set if a borrow was required for bit 7, otherwise it is cleared. In other words, if the unsigned value being subtracted is greater than the Accumulator the Carry Flag is set.

 Operation: MUL

Function:  Multiply Accumulator by B

Syntax:       MUL AB 

Description: Multiples the unsigned value of the Accumulator by the unsigned value of the "B" register. The least significant byte of the result is placed in the Accumulator and the most-significant-byte is placed in the "B" register.

 The Carry Flag (C) is always cleared.

 Operation: DIV

Function:  Divide Accumulator by B

Syntax:       DIV AB

 Description: Divides the unsigned value of the Accumulator by the unsigned value of the "B" register. The resulting quotient is placed in the Accumulator and the remainder is placed in the "B" register.

 The Carry flag (C) is always cleared.

 

Operation: INC

Function:  Increment Register

Syntax:   INC register 

Description: INC increments the value of register by 1. If the initial value of register is 255 (0xFF Hex), incrementing the value will cause it to reset to 0. Note: The Carry Flag is NOT set when the value "rolls over" from 255 to 0.

 

In the case of "INC DPTR", the value two-byte unsigned integer value of DPTR is incremented. If the initial value of DPTR is 65535 (0xFFFF Hex), incrementing the value will cause it to reset to 0. Again, the Carry Flag is NOT set when the value of DPTR "rolls over" from 65535 to 0.

 

Operation: DEC

Function:  Decrement Register

Syntax:       DEC register

 

Description: DEC decrements the value of register by 1. If the initial value of register is 0, decrementing the value will cause it to reset to 255 (0xFF Hex). Note: The Carry Flag is NOT set when the value "rolls over" from 0 to 255.

 

 

2.5)JUMP AND CALL INSTRUCTIONS(BRANCHING INSTRUCTIONS)

The last group of instructions in the 8051 Microcontroller Instruction Set are the Program Branching Instructions. These instructions control the flow of program logic. The mnemonics of the Program Branching Instructions are as follows.

·       LJMP

·       AJMP

·       SJMP

·       JZ

·       JNZ

·       CJNE

·       DJNZ

·       NOP

·       LCALL

·       ACALL

·       RET

·       RETI

·       JMP

Mnemonic	Description
LJMP	Long Jump (Unconditional)
AJMP	Absolute Jump (Unconditional)
SJMP	Short Jump (Unconditional)
JZ	Jump if A is equal to 0
JNZ	Jump if A is not equal to 0
CJNE	Compare and Jump if Not Equal
DJNZ	Decrement and Jump if Not Zero
NOP	No Operation
LCALL	Long Call to Subroutine
ACALL	Absolute Call to Subroutine (Unconditional)
RET	Return from Subroutine
RETI	Return from Interrupt
JMP	Jump to an Address (Unconditional)

·       All these instructions, except the NOP (No Operation) affect the Program Counter (PC) in one way or other. Some of these instructions has decision making capability before transferring control to other part of the program.

·       The following table shows all the mnemonics with respect to the program branching instructions.

 

Operation: JMP

Function:  Jump to Data Pointer + Accumulator

Syntax:       JMP @A+DPTR

Description: JMP jumps unconditionally to the address represented by the sum of the value of DPTR and the value of the Accumulator.

 

Operation: JC

Function:  Jump if Carry Set

Syntax:       JC reladdr

Description: JC will branch to the address indicated by reladdr if the Carry Bit is set. If the Carry Bit is not set program execution continues with the instruction following the JC instruction.

Operation: JNC

Function:  Jump if Carry Not Set

Syntax:   JNC reladdr

Description: JNC branches to the address indicated by reladdr if the carry bit is not set. If the carry bit is set program execution continues with the instruction following the JNB instruction.

 

Operation: DJNZ

Function:  Decrement and Jump if Not Zero

Syntax:   DJNZ register,reladdr

Description: DJNZ decrements the value of register by 1. If the initial value of register is 0, decrementing the value will cause it to reset to 255 (0xFF Hex). If the new value of register is not 0 the program will branch to the address indicated by relative addr. If the new value of register is 0 program flow continues with the instruction following the DJNZ instruction.

Operation: CJNE

Function:  Compare and Jump If Not Equal

Syntax:   CJNE operand1,operand2,reladdr

Description: CJNE compares the value of operand1 and operand2 and branches to the indicated relative address if operand1 and operand2 are not equal. If the two operands are equal program flow continues with the instruction following the CJNE instruction.

Operation: JZ

Function:  Jump if Accumulator Zero

Syntax:       JNZ reladdr

Description: JZ branches to the address indicated by reladdr if the Accumulator contains the value 0. If the value of the Accumulator is non-zero program execution continues with the instruction following the JNZ instruction.

Operation: JNZ

Function:  Jump if Accumulator Not Zero

Syntax:   JNZ reladdr

Description: JNZ will branch to the address indicated by reladdr if the Accumulator contains any value except 0. If the value of the Accumulator is zero program execution continues with the instruction following the JNZ instruction.

Operation: SJMP 

Function: Short Jump

Syntax:       SJMP reladdr

Description: SJMP jumps unconditionally to the address specified reladdr. Reladdr

must be within -128 or +127 bytes of the instruction that follows the SJMP instruction.

 Operation: LJMP 

Function: Long Jump 

Syntax:       LJMP code addr

Description: LJMP jumps unconditionally to the specified code addr.

Operation: AJMP

Function:  Absolute Jump Within 2K Block

Syntax:   AJMP code address

Description: AJMP unconditionally jumps to the indicated code address. The new value for the Program Counter is calculated by replacing the least-significant-byte of the Program Counter with the second byte of the AJMP instruction, and replacing bits 0-2 of the most-significant-byte of the Program Counter with 3 bits that indicate the page of the byte following the AJMP instruction. Bits 3-7 of the most-significant-byte of the Program Counter remain unchaged.

 

Since only 11 bits of the Program Counter are affected by AJMP, jumps may only be made to code located within the same 2k block as the first byte that follows AJMP.

 

Operation: LCALL Function: Long Call

Syntax:   LCALL code addr 

Description: LCALL calls a program subroutine. LCALL increments the program counter by 3 (to point to the instruction following LCALL) and pushes that value onto the stack (low byte first, high byte second). The Program Counter is then set to the 16- bit value which follows the LCALL opcode, causing program execution to continue at that address.

 

Operation: ACALL

Function:  Absolute Call Within 2K Block

Syntax:   ACALL code address

Description: ACALL unconditionally calls a subroutine at the indicated code address. ACALL pushes the address of the instruction that follows ACALL onto the stack, least-significant-byte first, most-significant-byte second. The Program Counter is then updated so that program execution continues at the indicated address.

 

The new value for the Program Counter is calculated by replacing the least- significant-byte of the Program Counter with the second byte of the ACALL instruction, and replacing bits 0-2 of the most-significant-byte of the Program Counter with 3 bits that indicate the page. Bits 3-7 of the most-significant-byte of the Program Counter remain unchaged.

 

Since only 11 bits of the Program Counter are affected by ACALL, calls may only be made to routines located within the same 2k block as the first byte that follows ACALL.

 

Operation: RET

Function:  Return From Subroutine

Syntax:       RET

 

Description: RET is used to return from a subroutine previously called by LCALL or ACALL. Program execution continues at the address that is calculated by popping the topmost 2 bytes off the stack. The most-significant-byte is popped off the stack first, followed by the least-significant-byte.

 

Operation: RETI

Function:  Return From Interrupt

Syntax:       RETI

 

Description: RETI is used to return from an interrupt service routine. RETI first enables interrupts of equal and lower priorities to the interrupt that is terminating. Program execution continues at the address that is calculated by popping the topmost 2 bytes off the stack. The most-significant-byte is popped off the stack first, followed by the least-significant-byte.

RETI functions identically to RET if it is executed outside of an interrupt service routine.

 

Bit-Wise Instructions

 

Operation: JB

Function:  Jump if Bit Set

Syntax:       JB bit addr, reladdr

 

Description: JB branches to the address indicated by reladdr if the bit indicated by bit addr is set. If the bit is not set program execution continues with the instruction following the JB instruction.

 

Operation: JNB

Function:  Jump if Bit Not Set

Syntax:   JNB bit addr,reladdr

 

Description: JNB will branch to the address indicated by reladdress if the indicated bit is not set. If the bit is set program execution continues with the instruction following the JNB instruction.

 

Operation: JBC

Function:  Jump if Bit Set and Clear Bit

Syntax:   JB bit addr, reladdr

 

Description: JBC will branch to the address indicated by reladdr if the bit indicated by bit addr is set. Before branching to reladdr the instruction will clear the indicated bit. If the bit is not set program execution continues with the instruction following the JBC instruction.

 

2.6)SIMPLE PROGRAM

Addition of two numbers:

ORG 00H        ; Origin, set starting address to 0; Initialize:

MOV A, #10H    ; Load the first number (16 in decimal) into Accumulator A

MOV B, #20H    ; Load the second number (32 in decimal) into register B; Addition:

ADD A, B       ; Add the contents of register B to Accumulator A (A = A + B); Store result:

MOV 30H, A     ; Store the result from Accumulator A into memory location 30H

END            ; End of program

simple program for addition in 8051

 

The provided code adds two numbers (16 and 32) and stores the result in memory location 30H. Here's the step-by-step breakdown:

1.     Initialization:

o   MOV A, #10H loads the first number (16 in decimal) into the Accumulator (A).

o   MOV B, #20H loads the second number (32 in decimal) into register B.

2.     Addition:

o   ADD A, B adds the contents of register B (32) to Accumulator A (16). After this operation, the Accumulator (A) contains the result (48 in decimal, or 30H in hexadecimal).

3.     Storing the Result:

o   MOV 30H, A stores the result (48) from Accumulator A into memory location 30H.

So, the output of this code will be:

·       Memory location 30H will contain the value 30H (which is 48 in decimal).

simple program that increments a number and stores the result in a register.

ORG 00H        ; Origin, set starting address to 0; Initialize:

MOV A, #05H    ; Load the number 5 into Accumulator A; Increment:

INC A          ; Increment the value in Accumulator A by 1; Store result:

MOV R0, A      ; Store the result from Accumulator A into register R0

END            ; End of program

1.     Initialization:

o   MOV A, #05H loads the number 5 into the Accumulator (A).

2.     Increment:

o   INC A increments the value in Accumulator A by 1. After this instruction, A contains 6.

3.     Storing the Result:

o   MOV R0, A stores the result (6) from Accumulator A into register R0.

Output:

·       The result of this code will be that register R0 contains the value 06H (which is 6 in decimal).

This program will blink an LED connected to Port 1:

ORG 00H      ; Origin, set starting address to 0; Initialize:

MOV P1, #00H ; Set all pins of Port 1 to 0 (turn off all LEDs)

MOV R2, #0FFH ; Load R2 with 255 (0xFF)

START:      ; Start of loop

MOV P1, A    ; Output content of Accumulator to Port 1 (toggle LEDs); Delay loop

DJNZ R2, $  ; Decrement R2 and jump to same instruction until R2 becomes 0

CPL A        ; Complement Accumulator (invert all bits in A)

SJMP START  ; Jump to START and repeat the process

END          ; End of program

1)Initialization:

·       MOV P1, #00H sets all pins of Port 1 to 0, turning off all LEDs.

·       MOV R2, #0FFH loads 255 into register R2 for the delay loop.

2)Toggling the LED:

·       CPL P1 complements Port 1, toggling the LED states.

3)Delay Loop:

·       DJNZ R2, $ decrements R2 and repeats the current instruction until R2 becomes 0, creating a delay.

·       MOV R2, #0FFH reloads R2 with 255 to reset the delay counter.

4)Loop:

·       SJMP START creates an infinite loop to keep the process ongoing.

APPLICATIONS

1)KEYBOARD INTERFACE:

The key board here we are interfacing is a matrix keyboard. This key board is designed with a particular rows and columns. These rows and columns are connected to the microcontroller through its ports of the micro controller 8051. We normally use 8*8 matrix key board. So only two ports of 8051 can be easily connected to the rows and columns of the key board.

          When ever a key is pressed, a row and a column gets shorted through that pressed key and all the other keys are left open.  When a key is pressed only a bit in the port goes high.  Which indicates microcontroller  that the key is pressed. By this high on the bit key in the corresponding column is identified.

          Once we are sure that one of key in the key board is pressed next our aim is to identify that key.  To do this we firstly check for particular row and then we check the corresponding column the key board.

          To check the row of the pressed key in the keyboard, one of the row is made high by making one of bit in the output port of 8051 high .  This is done until the row is found out.  Once we get the row next out job is to find out the column of the pressed key. The column  is detected by contents in the input ports with the help of a counter. The content of the input port is rotated with carry until the carry bit is set.

          The contents of the counter is then compared and displayed in the display. This display is designed using a seven segment display and a BCD to seven segment decoder IC 7447.

          The BCD equivalent number of counter is sent through output part of 8051 displays the number of pressed key.

 

 

 

The 8051 microcontroller can be interfaced with a keyboard to receive input from the user. This is typically done using a matrix keyboard, which is a grid of keys arranged in rows and columns.

Explanation:

1. Matrix Keyboard: A matrix keyboard is organized in rows and columns. Each key connects a specific row and column when pressed. This arrangement reduces the number of I/O pins required to interface with the microcontroller.
2. 8051 Microcontroller: The 8051 microcontroller has several I/O ports that can be used to interface with the keyboard. Typically, one port is used to drive the rows, and another port is used to read the columns.
3. Data Lines: The rows and columns of the keyboard are connected to the I/O ports of the 8051 microcontroller through data lines.

Working:

1. Scanning: The microcontroller scans the keyboard by sequentially activating each row and reading the columns. When a key is pressed, the corresponding column will be pulled low.
2. Debouncing: Key presses can generate multiple signals due to mechanical bounce. The microcontroller needs to debounce the input to ensure a single key press is registered. This can be done using software or hardware techniques.
3. Key Identification: Once a key press is detected and debounced, the microcontroller identifies the pressed key by determining the row and column that are connected.
4. Data Processing: The microcontroller can then process the input from the keyboard, such as storing it in memory, displaying it on an LCD, or using it to control other devices.

Applications:

Keyboard interfacing with the 8051 microcontroller has various applications, including:

• Embedded Systems: Keyboards are used in embedded systems for user input, such as in industrial control systems, remote controls, and consumer electronics.
• Human-Machine Interface (HMI): Keyboards provide a way for humans to interact with machines, such as in ATMs, kiosks, and computer terminals.
• Data Entry: Keyboards are used for data entry in applications like point-of-sale systems, data loggers, and testing equipment.

Advantages:

• Low Cost: Matrix keyboards are inexpensive and readily available.
• Simple Interface: Interfacing a keyboard with the 8051 microcontroller is relatively straightforward.
• Versatile: Keyboards can be used for various input applications.

Limitations:

• Limited Keys: The number of keys on a matrix keyboard is limited by the number of I/O pins available on the microcontroller.
• Complex Scanning: Scanning a matrix keyboard requires software or hardware techniques to identify pressed keys.
• Debouncing: Key presses need to be debounced to avoid multiple readings.

Overall, keyboard interfacing with the 8051 microcontroller is a common and useful technique for various applications. The matrix keyboard provides a cost-effective and simple way to input data into the microcontroller.

2) DISPLAY INTERFACE IN 8051

 

The 8051 microcontroller can be interfaced with various display devices to present information to the user. Common display types include:

• Seven-segment displays: Used to display numerical digits and some characters.
• LCDs (Liquid Crystal Displays): Can display alphanumeric characters and symbols.
• LEDs (Light Emitting Diodes): Simple indicators for on/off states or basic information.

Let's explore the interface with a 16x2 LCD, a popular choice for its versatility:

Diagram:

Explanation:

1. LCD Module (16x2): This module has 16 columns and 2 rows, capable of displaying characters. It has pins for data transfer, control signals, and power.
2. 8051 Microcontroller: The 8051 uses its I/O ports to communicate with the LCD. Some pins are configured as data lines, and others as control lines.
3. Data & Control Lines:
• Data Lines (DB0-DB7): Used to send data (characters to display) or commands (instructions to the LCD) between the microcontroller and LCD.
• Control Lines:
• RS (Register Select): Selects between data register (for displaying characters) and command register (for sending instructions).
• R/W (Read/Write): Controls the direction of data flow (read from LCD or write to LCD).
• E (Enable): Enables the LCD module for data transfer or command execution.

Working:

1. Initialization: The microcontroller sends specific commands to the LCD to configure it (e.g., set display mode, clear the screen).
2. Data Transfer: To display a character, the microcontroller:
• Sets RS to high (select data register).
• Places the ASCII value of the character on the data lines.
• Generates a pulse on the E line to latch the data.
3. Command Execution: To send a command (e.g., move cursor, clear screen), the microcontroller:
• Sets RS to low (select command register).
• Places the command code on the data lines.
• Generates a pulse on the E line to execute the command.

Applications:

• Embedded Systems: Displaying sensor readings, status messages, or user interface elements in devices like industrial controllers, medical equipment, and automotive systems.
• Consumer Electronics: Showing information on devices like calculators, digital clocks, and audio players.
• Instrumentation: Displaying measurement results on devices like multimeters, oscilloscopes, and signal generators.

Advantages:

• Alphanumeric Display: LCDs can display a wide range of characters and symbols.
• Low Power Consumption: Compared to other display types, LCDs consume less power.
• Easy Interface: Interfacing LCDs with the 8051 is relatively simple.

Limitations:

• Limited Graphics: Basic LCDs have limited capability for displaying graphics.
• Viewing Angle: The visibility of the display may vary depending on the viewing angle.
• Temperature Dependence: LCDs may have performance limitations in extreme temperatures.

Overall, interfacing displays with the 8051 microcontroller is essential for many applications. LCDs, particularly the 16x2 type, offer a good balance of functionality, cost-effectiveness, and ease of use.

3) PULSE MEASUREMENTS IN 8051

The 8051 microcontroller can be used to measure various pulse characteristics like frequency, pulse width, and duty cycle. This is often achieved using its built-in timers/counters.

Diagram:

Explanation:

1. Pulse Source: This can be any device generating a pulse signal, such as a sensor, signal generator, or another circuit.
2. 8051 Microcontroller: The 8051 uses its Timer/Counter units to measure the pulse characteristics. The pulse signal is fed into a specific pin (often a Timer input pin).
3. Input Pin: This pin on the 8051 is configured to receive the pulse signal.

Methods for Pulse Measurement:

The 8051's timers can be used in different modes to measure pulse characteristics:

1. Frequency Measurement:

• Using Timer as Counter: The timer is configured as a counter to count the number of pulses within a specific time interval. By knowing the number of pulses and the time interval, the frequency can be calculated.
• Using Timer in Capture Mode: The timer is configured to capture the timer value when a pulse edge (rising or falling) occurs. By measuring the time difference between consecutive captures, the frequency can be determined.

2. Pulse Width Measurement:

• Using Timer in Capture Mode: Similar to frequency measurement, the timer captures the timer value at the rising and falling edges of the pulse. The difference between these captured values represents the pulse width.

3. Duty Cycle Measurement:

• Combination of Frequency and Pulse Width: Measure both the frequency and pulse width as described above. The duty cycle (ratio of pulse width to the total period) can then be calculated.

Example: Frequency Measurement using Timer as Counter

1. Configure Timer: Set the timer in counter mode and start it.
2. Count Pulses: The timer increments its count for each incoming pulse.
3. Measure Time Interval: Use another timer or a software delay to define a specific time interval.
4. Read Count: After the time interval, read the value of the pulse counter.
5. Calculate Frequency: Divide the pulse count by the time interval to get the frequency.

Applications:

• Speed Measurement: Measuring the frequency of pulses from a wheel sensor to determine speed.
• Flow Measurement: Measuring the frequency of pulses from a flow meter to calculate flow rate.
• RPM Measurement: Measuring the frequency of pulses from a rotating shaft to determine RPM (revolutions per minute).
• Event Counting: Counting the number of events by measuring the pulses generated by a sensor.

Advantages:

• Accurate Measurement: Timers provide accurate measurement of pulse characteristics.
• Versatility: The 8051's timers can be configured for various pulse measurements.
• Real-time Operation: Measurements can be performed in real-time, allowing for dynamic monitoring.

Limitations:

• Timer Resolution: The accuracy of measurements is limited by the timer's resolution.
• Software Overhead: Some measurement methods may require software processing, which can introduce overhead.
• External Components: Some applications may require external components like signal conditioning circuits.

Overall, the 8051 microcontroller's timers provide a powerful tool for measuring pulse characteristics. This capability is essential in various applications requiring accurate and real-time measurement of pulse signals.

4) DIA AND AID CONVERSIONS

 It seems you might be referring to DAC (Digital-to-Analog Converter) and ADC (Analog-to-Digital Converter) conversions when you mention DIA and AID. Let's explore these concepts in the context of the 8051 microcontroller:

1. Analog-to-Digital Conversion (ADC)

• What it does: ADC converts an analog signal (like voltage from a sensor) into a digital value that the microcontroller can understand and process.
• Why it's needed: Many real-world signals are analog, while microcontrollers operate with digital data. ADC provides the bridge between these two worlds.

Explanation:

1. Analog Signal: This is the continuous signal from a sensor or other analog source (e.g., temperature, pressure, light intensity).
2. ADC Converter: This device takes the analog signal as input and produces a digital output. The digital output is a binary representation of the analog value.
3. 8051 Microcontroller: The 8051 reads the digital data from the ADC and can then process it, store it, or use it to control other devices.

ADC Interfacing with 8051:

• The 8051 typically requires an external ADC chip because it doesn't have a built-in ADC.
• Common ADC chips like the ADC0804 are interfaced with the 8051 using its I/O ports.
• The 8051 sends control signals to the ADC to initiate conversion and reads the digital data from the ADC's output.

2. Digital-to-Analog Conversion (DAC)

• What it does: DAC converts a digital value from the microcontroller into an analog signal.
• Why it's needed: To control analog devices (like motors, speakers, or valves) using the digital output of the microcontroller.

Explanation:

1. 8051 Microcontroller: The 8051 sends a digital value to the DAC.
2. DAC Converter: This device takes the digital value as input and produces a corresponding analog output (e.g., voltage or current).
3. Analog Output: This analog signal can be used to control an analog device.

DAC Interfacing with 8051:

• Similar to ADCs, the 8051 usually needs an external DAC chip.
• Common DAC chips like the DAC0808 are interfaced with the 8051.
• The 8051 sends digital data to the DAC, which converts it into an analog signal.

Applications:

• ADC:
• Reading sensor data (temperature, pressure, light)
• Data acquisition systems
• Industrial control
• DAC:
• Controlling motor speed
• Generating audio signals
• Adjusting voltage levels
• Controlling valves or actuators

Key Considerations:

• Resolution: The number of bits used to represent the analog value (e.g., 8-bit ADC has 2^8 = 256 possible levels). Higher resolution means more accurate conversion.
• Conversion Speed: How quickly the ADC or DAC can perform a conversion.
• Interface: How the ADC or DAC communicates with the 8051 (e.g., parallel, serial).

By understanding ADC and DAC conversions, you can effectively interface the 8051 microcontroller with the analog world, enabling it to interact with sensors, actuators, and other analog devices.

5) MULTIPLE INTERRUPTS

 An interrupt is a signal that temporarily halts the normal execution of a program and transfers control to a special routine called Interrupt Service Routine (ISR).

The 8051 microcontroller supports multiple interrupt sources, allowing it to respond to several external and internal events efficiently.

When more than one interrupt occurs simultaneously, the 8051 uses a priority mechanism to decide:

• Which interrupt is serviced first

• Whether an interrupt can interrupt another interrupt (nesting)

Thus, handling multiple interrupts is essential for real-time and multitasking applications.

Diagram:

Interrupt Sources in 8051 

The 8051 supports five interrupt sources:

Types of Interrupts	Function	Source	Vector Address
External Interrupt 0	Triggered by external signals on pin P3.2.	INT0 (P3.2)	0003H
Timer 0 Overflow	Triggered when Timer 0 overflows.	TF0	000BH
External Interrupt 1	Triggered by external signals on pin P3.3.	INT1 (P3.3)	0013H
Timer 1 Overflow	Triggered when Timer 1 overflows.	TF1	001BH
Serial Communication	Triggered during UART communication.	RI / TI	0023H

Each interrupt has:

• A fixed vector address
• A separate ISR

Interrupt Vector Table

The 8051 has an interrupt vector table, which contains the starting addresses of the Interrupt Service Routines (ISRs) for each interrupt source.

0000H  → Reset
0003H  → External Interrupt 0
000BH  → Timer 0 Interrupt
0013H  → External Interrupt 1
001BH  → Timer 1 Interrupt
0023H  → Serial Interrupt

Interrupt Enable (IE) Register
The IE register enables or disables specific interrupts. It is bit-addressable and located at address A8H. Key bits include:
EA (Global Enable): Enables all interrupts when set to 1.
EX0/EX1: Enable external interrupts INT0 and INT1.
ET0/ET1: Enable Timer 0 and Timer 1 interrupts.
ES: Enables the serial communication interrupt.
Function of Each Bit

 

  

  
Bit
  
  

  
Name
  
  

  
Function
  
 
 

  

  
EA
  
  

  
Enable All
  
  

  
Enables all interrupts
  
 
 

  

  
EX0
  
  

  
External 0
  
  

  
Enable INT0
  
 
 

  

  
ET0
  
  

  
Timer 0
  
  

  
Enable Timer 0
  
 
 

  

  
EX1
  
  

  
External 1
  
  

  
Enable INT1
  
 
 

  

  
ET1
  
  

  
Timer 1
  
  

  
Enable Timer 1
  
 
 

  

  
ES
  
  

  
Serial
  
  

  
Enable Serial
  interrupt
  
 




🔹 EA must be 1 for
any interrupt to occur.
Example:
MOV IE, #10001011B ; Enable INT0, INT1, and Timer 0 interrupts
Interrupt Priority (IP) Register
The IP register assigns priority levels to interrupts. It is bit-addressable and located at address B8H. Higher priority interrupts can interrupt lower-priority ones. Key bits include:
PX0/PX1: Priority for external interrupts INT0 and INT1.
PT0/PT1: Priority for Timer 0 and Timer 1 interrupts.
PS: Priority for serial communication interrupt.
Priority Levels

 
0 →
     Low Priority
 
1 →
     High Priority

 

  

  
Bit
  
  

  
Interrupt
  
 
 

  

  
PX0
  
  

  
External 0
  
 
 

  

  
PT0
  
  

  
Timer 0
  
 
 

  

  
PX1
  
  

  
External 1
  
 
 

  

  
PT1
  
  

  
Timer 1
  
 
 

  

  
PS
  
  

  
Serial
  
 
 Example:
MOV IP, #00000101B ; Set high priority for INT0 and Timer 0
External Interrupts
External interrupts (INT0 and INT1) can be configured as edge-triggered or level-triggered using the TCON register:
IT0/IT1: Set to 1 for edge-triggered, 0 for level-triggered.
IE0/IE1: Flags set when the corresponding external interrupt occurs.

Example:
MOV TCON, #00000001B ; Configure INT0 as edge-triggered
The TCON register controls the timers and external
interrupts. It’s also an 8-bit register with specific bits allocated to Timer
0, Timer 1, and the external interrupts. TCON is bit
addressable.
 TCON Register: Controls the start/stop of the timers, detects external interrupts, and holds the overflow flags for the timers.







 
TF1
     (TCON.7): Timer 1 overflow flag
 
TR1
     (TCON.6): Timer 1 run control bit
 
TF0
     (TCON.5): Timer 0 overflow flag
 
TR0
     (TCON.4): Timer 0 run control bit
 
IE1
     (TCON.3): External interrupt 1 edge flag
 
IT1
     (TCON.2): Interrupt 1 type control bit
 
IE0
     (TCON.1): External interrupt 0 edge flag
 
IT0
     (TCON.0): Interrupt 0 type control bit
Timer Interrupts
Timer interrupts occur when Timer 0 or Timer 1 overflows. The TF0/TF1 flags in the TCON register indicate overflow. The timers must be enabled using the TR0/TR1 bits.
Example:
MOV TMOD, #01H ; Set Timer 0 in Mode 1
MOV TH0, #0FFH ; Load initial value
SETB TR0 ; Start Timer 0
Serial Communication Interrupts
The RI (Receive Interrupt) and TI (Transmit Interrupt) flags in the SCON register handle UART communication. These flags must be cleared in the ISR to acknowledge the interrupt.
Interrupt
Handling Process:

1. Interrupt Request: An external device or internal event triggers an interrupt.
2. Interrupt Flag: The corresponding interrupt flag in the 8051's Interrupt Enable (IE) register is set.
3. Interrupt Enable: The interrupt must be enabled in the IE register for the 8051 to respond to it. Each interrupt source has its own enable bit. A global enable bit (EA) must also be set to allow any interrupts.
4. Interrupt Vector Table: The 8051 has an interrupt vector table, which contains the starting addresses of the Interrupt Service Routines (ISRs) for each interrupt source.
5. ISR Execution: When an interrupt occurs, the 8051 jumps to the corresponding ISR in the interrupt vector table. The ISR contains the code to handle the specific interrupt event.
6. Return from Interrupt: After the ISR is executed, the 8051 returns to the main program where it left off.

Interrupt Priority:

The 8051 allows you to assign priorities to different interrupts. This ensures that more important interrupts (e.g., a critical error condition) are handled before less important ones. The Interrupt Priority (IP) register is used to set interrupt priorities.

Advantages of Using Interrupts:

• Responsiveness: The 8051 can respond quickly to events without constantly polling.
• Efficiency: The microcontroller can perform other tasks while waiting for interrupts.
• Real-time Operation: Interrupts are essential for real-time systems that need to react to events in a timely manner.

Key Registers:

• IE (Interrupt Enable) Register: Controls which interrupts are enabled.
• IP (Interrupt Priority) Register: Sets the priority of interrupts.

By using multiple interrupts effectively, you can design more complex and responsive embedded systems with the 8051 microcontroller. Properly managing interrupt priorities is essential for ensuring that critical tasks are handled promptly.